IBIS Model Specification

The IBIS Model Specification

By Timothy Coyle

IBIS Saves the Day

While the SPICE model language is very powerful and well known it does have some disadvantages especially when you want to give an external customer a simulation model representing the IO buffer. That’s where the Input/Output Buffer Information Specification fits into the overall picture. Often referred to as an IBIS model it is actually an IBIS file that contains data in a standard format that represents the analog behavior of the IO buffer.


The IBIS specification was developed in response to the concerns of using SPICE models for system level simulations.

In order to protect the IP of a design the transistor level models were replaced with look up tables consisting of current and voltage that represent the transistor under certain conditions. These look up data tables can then be plugged into an algorithm used by a simulator to recreate the behavior of the IO buffer. In a sense, IBIS is really a behavioral model since it provides only data and not any actual device model properties.

Since an IBIS model is really a behavioral model the simulation times using an IBIS model instead of a SPICE model is substantially less with claims of 100x faster simulation being made in the past. This is actually an important feature of an IBIS model. For example, in a DDR3 memory subsystem a simulation plan of tens of thousands of simulation runs is not unheard of. If each SPICE model simulation takes two minutes but the IBIS model simulation takes thirty seconds you can see how the time savings can quickly add up.

Another important aspect of the IBIS Specification is that since it is an open and approved standard it is tool independent allowing a variety of EDA solutions to exist for the use of IBIS models in system level simulations. This has been very useful for semiconductor vendors who need to provide simulation models to external customers who may not all be using the same EDA vendor.


While the IBIS Specification has been adopted widely across the industry for system level simulations and has found its role as a SPICE model replacement there are some disadvantages.

The biggest disadvantage of the IBIS Specification is trying to keep the specification up to date with the current technology and demands for system level simulations. As new circuit design techniques become popular among semiconductor vendors the IBIS Specification needs to be updated to include these technology advances and it is not always a smooth or timely transition.

The other disadvantage of the IBIS Specification is that an IBIS model is only as good as the EDA simulator you are using the IBIS model in. If an EDA vendor is lagging in adding support for new IBIS Specification features than the usefulness of the IBIS model is drastically reduced.

With any standard or specification it is always a challenge to keep the standard updated with the technology needs of the users. While the IBIS Specification has some technical challenges and limitations with every version it so far has been able to change and update with the needs of users and still provides a better overall solution to SPICE models for most users.

References and Links

The best resource for the IBIS Specification is the IBIS Open Forum website which is the official working group for the IBIS Specification. There are links to the actual IBIS Specification (which is free) as well as free tools, articles, and vendor supplied model links.

IBIS Open Forum,

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