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Overview of SPICE Model

History of SPICE

By Timothy Coyle

Get To Know SPICE

SPICE stands for Simulation Program with Integrated Circuit Emphasis and since the original Berkeley SPICE in the seventies has been the golden standard in IO buffer simulation. SPICE uses transistor level process data information to represent the IO buffer like gate oxide thickness and channel length. Below is an example of a simple CMOS inverter that shows the schematic view and the corresponding SPICE netlist syntax.

Advantages

The advantages of the SPICE model language is what I like to call “if you can think it, you can model it” philosophy. Using the SPICE syntax you can use full transistor model devices, macro models, or ideal components. You can also model complex interactions like equalization. There really isn’t anything that you cannot model in SPICE making it the standard modeling language for semiconductor design.

Disadvantages

If SPICE models are so great than you might be thinking why are we even bothering with IBIS models? While the SPICE language allows you to do almost anything you want there also comes added complexity and some disadvantages with all of that modeling freedom.

Probably the biggest disadvantage to using SPICE models for IO buffer modeling is that it will reveal your intellectual property. If you are designing an op amp and by arranging your transistors with certain properties you get lower power than your competitor you are not going to want your competitor looking at your transistor process data in your SPICE models. You can use various encryption schemes to protect your IP in your SPICE models but than your customers will be locked into a specified format which is not a feasible approach.

A full transistor level SPICE model can be very slow when running long transient simulations that are often necessary for system level validation analysis. Most SPICE applications use matrix based math algorithms to solve for the voltages and currents in the design that need to be computed for every transistor taking into account the process parameters. Depending on various variables this can take considerable simulation time to complete.

Finally, depending on your tastes some find dealing with the large set of SPICE syntax difficult when trying to debug a SPICE model of a chip design. It can take some practice and experience to be able to sort through a text based netlist and find a missing ground node or floating input causing an error.

References and Links

I think the SPICE Page website is one of the better resources on the web to read about the origins of the SPICE language and how it has branched into open source and commercial offerings.

The Spice Page, http://bwrc.eecs.berkeley.edu/Classes/icbook/SPICE/.




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