IO Buffer Models for Signal Integrity Simulation

The IO Buffer Model Matrix

By Timothy Coyle

The Matrix Has You

We’ve talked about various model formats for simulating an IO buffer but it can sometimes be a challenge to determine the best model approach to take. Fear not, because I have created the IO Buffer Model Matrix to guide you along your way.

Example of Using the IO Buffer Model Matrix

Selecting a model format to represent an IO buffer in a design has more factors and variables than we can cover in one chapter. Sometimes you can only get one type of model from a vendor. Sometimes you need to model an advanced circuit.

Here’s my standard selection criterion using the above matrix:

    Start with IBIS First. The IBIS Specification is widely supported and used by most vendors both internally and externally. We’ve talked about the benefits of IBIS models including fast simulation times so IBIS is usually the first place I start.
    Go to SPICE If Advanced Capability Needed. If you need advanced simulation capability that is not easily supported with IBIS sometimes it is just best to go to the source and use a SPICE model. Of course the simulation run times will be longer but remember you can model just about anything in SPICE.
    Macromodel for Special Cases. I usually reserve macromodels for special cases where SPICE is not available or simulation run time is a concern.

Nothing is set in stone so at the end of the day it is really sound engineering judgment that should be used to select the appropriate IO buffer model format. Each model format, IBIS/SPICE/Macromodel has its unique properties and by using the IO Buffer Matrix you can start to make the trade-offs to determine the best approach.

References and Links

Here's a link to an article I wrote discussing different simulation model needs for high speed digital designs.

“The Need for Speed”, Printed Circuit Design and Fab Magazine, February 2009, Tim Coyle, Signal Consulting Group LLC.

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