Transistor IV Curves for IBIS Models

Transistor IV Curves

By Timothy Coyle

Circuit 101: Understanding Transistor IV Curves

We’re not going to break out our college textbooks on semiconductor physics but we need to discuss some transistor device equations so we can understand what the IBIS IV curves really represent.

The image above describes a generic NMOS transistor with associated equations. To generate an IBIS Pulldown IV data curve for the NMOS the source is usually tied to ground and the gate is tied to a digital low and the drain is swept with the current being measured as in the Id versus Vds graph. The IV curves in an IBIS model is really just the Id versus Vds graph in a table format for a specific loading condition. The same theory applies to the PMOS transistor.

Regions of Operation

It’s important to look at an example IV curve to show the different regions of operation. Again we are using a generic NMOS transistor. There are different operating regions (traditionally triode and active) of the transistor that are represented by separate equations.

IBIS Is a Real Modeling Solution

The whole point of this exercise is to show that the data in an IBIS file is based upon actual real device physics and it’s a valid behavioral model for system level simulations. Rather than having the simulator take the transistor level device parameters and use the transistor equations to calculate the current Id (one of the reasons SPICE simulations take longer) IBIS gives the simulator the current Id (under a certain condition like you were finding an operating point of an amplifier) from the IV data curve. After that, the complex interactions between a signals going from a driver to a receiver is all about reflection coefficients and complex mathematics that don’t rely on device models.

References and Links

Rather than me turning this article into a full tutorial on circuit design and device physics theory I’ll point you to a few resources in other books that cover the circuit theory behind an IBIS model with much better attention to detail.

“High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices”, Hall, Hall, and McCall. Chapter 7 : Buffer Modeling. ISBN # 978-0471360902.

“Analysis and Design of Analog Integrated Circuits”, Gray, Hurst, Lewis, and Meyer. ISBN # 0-471-32168-0.

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